国产第1页_91在线亚洲_中文字幕成人_99久久久久久_五月宗合网_久久久久国产一区二区三区四区

讀書月攻略拿走直接抄!
歡迎光臨中圖網 請 | 注冊
> >>
計算機組成與設計:硬件/軟件接口(英文版·原書第5版·risc-v版)

包郵 計算機組成與設計:硬件/軟件接口(英文版·原書第5版·risc-v版)

出版社:機械工業出版社出版時間:2019-07-01
開本: 16開 頁數: 692
讀者評分:5分1條評論
本類榜單:教材銷量榜
中 圖 價:¥155.7(6.8折) 定價  ¥229.0 登錄后可看到會員價
加入購物車 收藏
開年大促, 全場包郵
?新疆、西藏除外
本類五星書更多>
買過本商品的人還買了

計算機組成與設計:硬件/軟件接口(英文版·原書第5版·risc-v版) 版權信息

計算機組成與設計:硬件/軟件接口(英文版·原書第5版·risc-v版) 本書特色

圖靈獎得主Patterson和Hennessy經典著作全新RISC-V版,深入掌握軟硬件協同設計思想,共建開源體系結構生態

計算機組成與設計:硬件/軟件接口(英文版·原書第5版·risc-v版) 內容簡介

本書是經典著作《計算機組成與設計》繼MIPS版、ARM版之后的*新版本,這一版專注于RISC-V,是Patterson和Hennessy的又一力作。RISC-V指令集作為首個開源架構,是專為云計算、移動計算以及各類嵌入式系統等現代計算環境設計的架構。本書更加關注后PC時代發生的變革,通過實例、練習等詳細介紹*新計算模式,更新的內容還包括平板電腦、云基礎設施以及ARM(移動計算設備)和x86 (云計算)體系結構。

計算機組成與設計:硬件/軟件接口(英文版·原書第5版·risc-v版) 目錄

C H A P T E R S
1 Computer Abstractions and Technology 2
1.1 Introduction 3
1.2 Eight Great Ideas in Computer Architecture 11
1.3 Below Your Program 13
1.4 Under the Covers 16
1.5 Technologies for Building Processors and Memory 24
1.6 Performance 28
1.7 The Power Wall 40
1.8 The Sea Change: The Switch from Uniprocessors to Multiprocessors 43
1.9 Real Stuff: Benchmarking the Intel Core i7 46
1.10 Fallacies and Pitfalls 49
1.11 Concluding Remarks 52
1.12 Historical Perspective and Further Reading 54
1.13 Exercises 54
2 Instructions: Language of the Computer 60
2.1 Introduction 62
2.2 Operations of the Computer Hardware 63
2.3 Operands of the Computer Hardware 67
2.4 Signed and Unsigned Numbers 74
2.5 Representing Instructions in the Computer 81
2.6 Logical Operations 89
2.7 Instructions for Making Decisions 92
2.8 Supporting Procedures in Computer Hardware 98
2.9 Communicating with People 108
2.10 RISC-V Addressing for Wide Immediates and Addresses 113
2.11 Parallelism and Instructions: Synchronization 121
2.12 Translating and Starting a Program 124
2.13 A C Sort Example to Put it All Together 133
2.14 Arrays versus Pointers 141
2.15 Advanced Material: Compiling C and Interpreting Java 144
2.16 Real Stuff: MIPS Instructions 145
2.17 Real Stuff: x86 Instructions 146
2.18 Real Stuff: The Rest of the RISC-V Instruction Set 155
2.19 Fallacies and Pitfalls 157
2.20 Concluding Remarks 159
2.21 Historical Perspective and Further Reading 162
2.22 Exercises 162
3 Arithmetic for Computers 172
3.1 Introduction 174
3.2 Addition and Subtraction 174
3.3 Multiplication 177
3.4 Division 183
3.5 Floating Point 191
3.6 Parallelism and Computer Arithmetic: Subword Parallelism 216
3.7 Real Stuff: Streaming SIMD Extensions and Advanced Vector Extensions
in x86 217
3.8 Going Faster: Subword Parallelism and Matrix Multiply 218
3.9 Fallacies and Pitfalls 222
3.10 Concluding Remarks 225
3.11 Historical Perspective and Further Reading 227
3.12 Exercises 227
4 The Processor 234
4.1 Introduction 236
4.2 Logic Design Conventions 240
4.3 Building a Datapath 243
4.4 A Simple Implementation Scheme 251
4.5 An Overview of Pipelining 262
4.6 Pipelined Datapath and Control 276
4.7 Data Hazards: Forwarding versus Stalling 294
4.8 Control Hazards 307
4.9 Exceptions 315
4.10 Parallelism via Instructions 321
4.11 Real Stuff: The ARM Cortex-A53 and Intel Core i7 Pipelines 334
4.12 Going Faster: Instruction-Level Parallelism and Matrix Multiply 342
4.13 Advanced Topic: An Introduction to Digital Design Using a Hardware
Design Language to Describe and Model a Pipeline and More Pipelining
Illustrations 345
4.14 Fallacies and Pitfalls 345
4.15 Concluding Remarks 346
4.16 Historical Perspective and Further Reading 347
4.17 Exercises 347
5 Large and Fast: Exploiting Memory Hierarchy 364
5.1 Introduction 366
5.2 Memory Technologies 370
5.3 The Basics of Caches 375
5.4 Measuring and Improving Cache Performance 390
5.5 Dependable Memory Hierarchy 410
5.6 Virtual Machines 416
5.7 Virtual Memory 419
5.8 A Common Framework for Memory Hierarchy 443
5.9 Using a Finite-State Machine to Control a Simple Cache 449
5.10 Parallelism and Memory Hierarchy: Cache Coherence 454
5.11 Parallelism and Memory Hierarchy: Redundant Arrays of Inexpensive
Disks 458
5.12 Advanced Material: Implementing Cache Controllers 459
5.13 Real Stuff: The ARM Cortex-A53 and Intel Core i7 Memory
Hierarchies 459
5.14 Real Stuff: The Rest of the RISC-V System and Special Instructions 464
5.15 Going Faster: Cache Blocking and Matrix Multiply 465
5.16 Fallacies and Pitfalls 468
5.17 Concluding Remarks 472
5.18 Historical Perspective and Further Reading 473
5.19 Exercises 473
6 Parallel Processors from Client to Cloud 490
6.1 Introduction 492
6.2 The Difficulty of Creating Parallel Processing Programs 494
6.3 SISD, MIMD, SIMD, SPMD, and Vector 499
6.4 Hardware Multithreading 506
6.5 Multicore and Other Shared Memory Multiprocessors 509
6.6 Introduction to Graphics Processing Units 514
6.7 Clusters, Warehouse Sc
展開全部
商品評論(1條)
  • 主題:書還挺新,是正版

    沒想到中圖網買教材也同樣可靠

    2020/9/4 0:33:32
    讀者:******(購買過本書)
書友推薦
本類暢銷
編輯推薦
返回頂部
中圖網
在線客服
主站蜘蛛池模板: 极品吹潮视频大喷潮tv | 97人妻精品一区二区三区 | 在线亚洲小视频 | 欧美a级在线 | 国产禁女女网站免费看 | 国产色视频在线 | 亚洲第一精品夜夜躁人人爽 | 欧美裸体xxxx极品少妇 | 四虎影视2022入口网址 | 久久久最新精品 | 人人妻人人澡人人爽欧美一区双 | 亚洲五月六月丁香激情 | 成人久久18免费网站游戏 | 中国人与黑人牲交free欧美 | 久久avav| 四虎4hu亚洲精品 | 国产动作大片中文字幕 | 日韩精品一区二区三区免费视频 | 免费观看小视频 | 亚洲精品高清在线一区二区三区 | 亚洲av区无码字幕中文色 | 人妻夜夜爽天天爽爽一区 | 精久久| 偷拍自拍五月天 | 免费无码又爽又高潮视频 | 亚洲av无码国产精品色软件下戴 | 国产av一区二区三区 | 亚洲成a人片在线观 | 日韩精品亚洲精品485页 | 青青青手机在线视频 | 道区二区三区四区 | 黄色的视频免费 | 强美女的免费视频网站 | 久久棈精品久久久久久噜噜 | 妞干网手机免费视频 | 午夜影院免费在线观看 | 国产精品一区二区三区四区五区 | 女人18毛片a级毛片免费视频 | 依依成人精品无v国产 | 亚洲国产精华液网站w | 精品亚洲成a人在线观看青青 |